Various further remarks:
1) Filenames with spaces (incl. tab and newline) are currently not supported; please don’t use them for submission files.
2) Important note on folders management: for all results folders, you need to maintain “results” as substring in the folder’s name. Otherwise, these results would be re-run over and over, as we’re currently see happening. (The alternative is to disable the feature of subfolders altogether.)
3) In scores.rpt, “des_DRC” is renamed to “des_issues” and comprises now all the checks summarized in checks_summary.rpt, not only DRC checks. Any issues are also warned about in warnings.rpt, with reference to related, new report files provided in there as well.
4) As indicated, (most of) these checks will not be handled as hard constraints, so issues reported there will only impact the score, not the further evaluation and acceptance of submissions. The only exceptions (hard constraints) are to maintain cell nets, net assets, and functional equivalence.
5) Note that there are some issues already present in the benchmarks’ baseline layouts. Specifically, there are DRC and module/top pin issues with AES_2, as previously indicated. We will keep them as is, and if you can fix those in your submissions, scores would be improved, but if not, you won’t be penalized either.
Here’s an overview on the checks and commands performed, as summarized in checks_summary.rpt:
Equivalence issues — as reported by Conformal LEC, allowing for pipeline retiming but requiring cycle accuracy/equivalence
Unreachable points issues — same setup/command as above; relates to components with connectivity missing
Undriven pins issues — as reported by Conformal LEC during parsing, relates to open cell pins
Open output ports issues — same setup/command as above; relates to open/dangling cell output pins
Net output floating issue — same setup/command as above; relates to cell output pins that are trivially connected to floating dummy wires
Basic routing issues — as reported by Innovus check_connectivity command, relates to routing issues like dangling wires, floating metals, etc.
Module pin issues — as reported by Innovus check_pin_assignment command, relates to module/top-level pins
Unplaced components issues — as reported by Innovus “check_design -type route” command
Placement and/or routing issues — same setup/command as above, relates to generic placement and/or routing issues
DRC issues — as reported by Innovus check_DRC command, relates to routing DRC issues
Regarding “Net output floating issues” and “Open output ports issues”, both issues relate to components having some output pin open — think of FFs with only Q or QN used, but not both — or only trivially connected to dummy UNCONNECTED wires. These issues mainly arise from synthesis. As these are relevant for our notions of security, these issues will be maintained and contribute for the scoring.
While some checks are redundant in principle, in practice this depends on the kind of issues present or not in the layouts. And, not all possible issues will be reported by some subset of these commands; hence we employ this broader set of checks.