Agenda
8:45am-9:00am: Coffee and Light Breakfast (Room 909)
9am-9:20am: Opening Remarks and Workshop Goals
9:20am-10am: Keynote 1: Rob Rutenbar (U. Pitt)
10am-11:15am: Panel: Scoping out the Problem: Which areas is AI/ML poised for immediate impact in hardware design and EDA?
Moderator: Deming Chen (UIUC)
Panelists: Jayanthi Pallinti (Broadcomm), Mark Ren (NVidia), Serge Leef (Microsoft), Yiran Chen (Duke), Ivan Kissiov (Siemens EDA), JV Rajendran (TAMU)
11:15am-11:30am: Coffee Break + Participant Survey
11:30am-12am: Invited Lighnting Talks (10 mins each): Celine Lin and Mark Ren (GREAT); Vidya Chhabria (SLICE); Chinmay Hegde (livbench.ai)
Noon-1pm: Lunch
1pm-1:40pm: Keynote 2: Ruchir Puri (IBM)
1:40pm-1:50m: Coffee Break + Participant Survey
1:50pm-3pm: Panel 2: How can we build high-quality datasets and evaluation benchmarks?
Moderator: Siddharth Garg (NYU)
Panelists: Amir Yazdanbakhsh (Google), Vidya Chhabria (ASU), VJ Reddi (Harvard), Nate Pinckney (Nvidia), Ismail Bustany (AMD), Jose Renau (UCSC)
3pm-3:15pm: Coffee Break + Participant Survey
3:15pm-4:30pm: Breakout Sessions
Each session must come back to us with three slides: (1) how can we build datasets via industry-academia collaboration; (2) how can we perform benchmarking and evals; (3) Path forward: recommend a concrete plan of action and what can NSF do to accelerate this effort.
- Design Specification (Architecture and/or RTL); Lead: Sai Zhang
- Test and Verification; Lead: JV Rajendran
- EDA Flow; Lead: Austin Rovinski
4:30pm-5pm: Breakout session reports and action items